Sciweavers

657 search results - page 47 / 132
» Analysis of Multithreaded Architectures for Parallel Computi...
Sort
View
CLUSTER
2008
IEEE
14 years 5 months ago
A multicore-enabled multirail communication engine
—The current trend in clusters architecture leads toward a massive use of multicore chips. This hardware evolution raises bottleneck issues at the network interface level. The us...
Elisabeth Brunet, François Trahay, Alexandr...
CAL
2006
13 years 10 months ago
Performance, power efficiency and scalability of asymmetric cluster chip multiprocessors
This paper evaluates asymmetric cluster chip multiprocessor (ACCMP) architectures as a mechanism to achieve the highest performance for a given power budget. ACCMPs execute serial ...
T. Y. Morad, Uri C. Weiser, A. Kolodnyt, Mateo Val...
LCPC
2004
Springer
14 years 4 months ago
Trimaran: An Infrastructure for Research in Instruction-Level Parallelism
Trimaran is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is characterized by HPL-PD, a parameterized processor a...
Lakshmi N. Chakrapani, John C. Gyllenhaal, Wen-mei...
IPPS
2006
IEEE
14 years 4 months ago
Design and analysis of matching circuit architectures for a closest match lookup
— This paper investigates the implementation of a number of circuits used to perform a high speed closest value match lookup. The design is targeted particularly for use in a sea...
Kieran McLaughlin, Friederich Kupzog, Holger Blume...
EDOC
2009
IEEE
14 years 2 months ago
Enterprise Architecture Analysis for Data Accuracy Assessments
- Poor data in information systems impede the quality of decision-making in many modern organizations. Manual business process activities and application services are never execute...
Per Närman, Pontus Johnson, Mathias Ekstedt, ...