Sciweavers

657 search results - page 62 / 132
» Analysis of Multithreaded Architectures for Parallel Computi...
Sort
View
DATE
2006
IEEE
100views Hardware» more  DATE 2006»
14 years 4 months ago
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
Luciano Bononi, Nicola Concer
GLVLSI
2003
IEEE
202views VLSI» more  GLVLSI 2003»
14 years 3 months ago
System level design of real time face recognition architecture based on composite PCA
Design and implementation of a fast parallel architecture based on an improved principal component analysis (PCA) method called Composite PCA suitable for real-time face recogniti...
Rajkiran Gottumukkal, Vijayan K. Asari
SSDBM
1998
IEEE
105views Database» more  SSDBM 1998»
14 years 2 months ago
Scalable, Parallel, Scientific Databases
: Large scientific applications which rely on highly parallel computational analysis require highly parallel data access. We describe an object-oriented, scientific database system...
John L. Pfaltz, Russell F. Haddleton, James C. Fre...
CCGRID
2009
IEEE
14 years 5 months ago
Performance Issues in Parallelizing Data-Intensive Applications on a Multi-core Cluster
The deluge of available data for analysis demands the need to scale the performance of data mining implementations. With the current architectural trends, one of the major challen...
Vignesh T. Ravi, Gagan Agrawal
IPPS
2005
IEEE
14 years 4 months ago
Enhancing NIC Performance for MPI using Processing-in-Memory
Processing-in-Memory (PIM) technology encompasses a range of research leveraging a tight coupling of memory and processing. The most unique features of the technology are extremel...
Arun Rodrigues, Richard C. Murphy, Ron Brightwell,...