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MICRO
1999
IEEE
109views Hardware» more  MICRO 1999»
13 years 12 months ago
Compiler-Directed Dynamic Computation Reuse: Rationale and Initial Results
Recent studies on value locality reveal that many instructions are frequently executed with a small variety of inputs. This paper proposes an approach that integrates architecture...
Daniel A. Connors, Wen-mei W. Hwu
ICPR
2004
IEEE
14 years 8 months ago
An FPGA-Based Architecture for Real Time Image Feature Extraction
We propose a novel FPGA-based architecture for the extraction of four texture features using Gray Level Cooccurrence Matrix (GLCM) analysis. These features are angular second mome...
Dimitrios E. Maroulis, Dimitrios K. Iakovidis, Dim...
IRREGULAR
1995
Springer
13 years 11 months ago
Run-Time Parallelization of Irregular DOACROSS Loops
Dependencies between iterations of loop structures cannot always be determined at compile-time because they may depend on input data which is known only at run-time. A prime examp...
V. Prasad Krothapalli, Thulasiraman Jeyaraman, Mar...
ICCSA
2004
Springer
14 years 1 months ago
Speculative Parallelization of a Randomized Incremental Convex Hull Algorithm
Finding the fastest algorithm to solve a problem is one of the main issues in Computational Geometry. Focusing only on worst case analysis or asymptotic computations leads to the d...
Marcelo H. Cintra, Diego R. Llanos Ferraris, Bel&e...
ICPADS
2007
IEEE
14 years 2 months ago
Parallel Minimum Spanning Tree Heuristic for the steiner problem in graphs
Given an undirected graph with weights associated with its edges, the Steiner tree problem consists of finding a minimum weight subtree spanning a given subset of (terminal) nodes...
Hoda Akbari, Zeinab Iranmanesh, Mohammad Ghodsi