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» Analysis of a reconfigurable network processor
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113
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HOTI
2005
IEEE
15 years 9 months ago
Design and Implementation of a Content-Aware Switch Using a Network Processor
Cluster based server architectures have been widely used as a solution to overloading in web servers because of their cost effectiveness, scalability and reliability. A content aw...
Li Zhao, Yan Luo, Laxmi N. Bhuyan, Ravishankar R. ...
119
Voted
INFOCOM
1993
IEEE
15 years 7 months ago
A Generalized Processor Sharing Approach to Flow Control in Integrated Services Networks: The Multiple Node Case
Worst-casebounds on delay and backlog are derived for leaky bucket constrained sessions in arbitrary topology networks of Generalized Processor Sharing (GPS) 10] servers. The inhe...
Abhay K. Parekh, Robert G. Gallager
122
Voted
INFOCOM
2007
IEEE
15 years 9 months ago
On the Extreme Parallelism Inside Next-Generation Network Processors
Next-generation high-end Network Processors (NP) must address demands from both diversified applications and ever-increasing traffic pressure. One major challenge is to design an e...
Lei Shi, Yue Zhang 0006, Jianming Yu, Bo Xu, Bin L...
DSN
2008
IEEE
15 years 10 months ago
Coverage of a microarchitecture-level fault check regimen in a superscalar processor
Conventional processor fault tolerance based on time/space redundancy is robust but prohibitively expensive for commodity processors. This paper explores an unconventional approac...
Vimal K. Reddy, Eric Rotenberg
DSOM
2007
Springer
15 years 7 months ago
Bottleneck Detection Using Statistical Intervention Analysis
Abstract. The complexity of today's large-scale enterprise applications demands system administrators to monitor enormous amounts of metrics, and reconfigure their hardware as...
Simon Malkowski, Markus Hedwig, Jason Parekh, Calt...