Sciweavers

65 search results - page 3 / 13
» Analysis of buffered hybrid structured clock networks
Sort
View
ASPDAC
2010
ACM
161views Hardware» more  ASPDAC 2010»
13 years 5 months ago
A dual-MST approach for clock network synthesis
Abstract--In nanometer-scale VLSI physical design, clock network becomes a major concern on determining the total performance of digital circuit. Clock skew and PVT (Process, Volta...
Jingwei Lu, Wing-Kai Chow, Chiu-Wing Sham, Evangel...
JSAC
2006
167views more  JSAC 2006»
13 years 7 months ago
Secure and resilient clock synchronization in wireless sensor networks
Abstract--Wireless sensor networks have received a lot of attention recently due to its wide applications. An accurate and synchronized clock time is crucial in many sensor network...
Kun Sun, Peng Ning, Cliff Wang
ASPDAC
2005
ACM
140views Hardware» more  ASPDAC 2005»
14 years 1 months ago
A multi-level transmission line network approach for multi-giga hertz clock distribution
-In high performance systems, process variations and fluctuations of operating environments have significant impact on the clock skew. Recently, hybrid structures of H-tree and m...
Hongyu Chen, Chung-Kuan Cheng
CIKM
2011
Springer
12 years 7 months ago
Structural link analysis and prediction in microblogs
With hundreds of millions of participants, social media services have become commonplace. Unlike a traditional social network service, a microblogging network like Twitter is a hy...
Dawei Yin, Liangjie Hong, Brian D. Davison
INFOCOM
1996
IEEE
13 years 12 months ago
Latency-Rate Servers: A General Model for Analysis of Traffic Scheduling Algorithms
In this paper, we develop a general model, called Latency-Rate servers (LR servers), for the analysis of traffic scheduling algorithms in broadband packet networks. The behavior of...
Dimitrios Stiliadis, Anujan Varma