747 search results - page 13 / 150 » Analysis of communication delay bounds for network on chips |
GLOBECOM
2009
IEEE
14 years 25 days ago
2009
IEEE
A challenging research issue of analyzing networks where packets are served probabilistically, such as multi-access networks and wireless networks, is to characterize the stochasti...
ICC
2007
IEEE
14 years 3 months ago
2007
IEEE
— To enable real-time and robust message delivery, the highly mobile Vehicular Ad Hoc Networks (VANETs) call for comprehensive investigation on the dynamic power control effects ...
ANOR
2008
13 years 9 months ago
2008
We study a single-router Network-on-Chip modelled as a tandem queueing network. The first node is a geoK /D/1 queue (K fixed) representing a network interface, and the second node...
SIGCOMM
1995
ACM
14 years 15 days ago
1995
ACM
In most network models for quality of service support, the communication links interconnecting the switches and gateways are assumed to have fixed bandwidth and zero error rate. T...
TC
2008
13 years 9 months ago
2008
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...