We consider the problem of model checking modular Petri nets for the linear time logic LTL-X. An algorithm is presented which can use the synchronisation graph from modular analysi...
Rising Field Programmable Gate Array (FPGA) market volumes combined with increasing industrial popularity have driven prices down and improved capability to the point that FPGA ha...
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. Noise analysis techniques can detect some of such noise faults, but accu...
Yajun Ran, Alex Kondratyev, Yosinori Watanabe, Mal...
interpretation. In the context of stream parallelism, this analysis identi es an amount of input data for which predicate execution can safely wait without danger of introducing de...
Moreno Falaschi, Patrick Hicks, William H. Winsbor...
The automated analysis of Feature Models (FMs) focuses on the usage of different logic paradigms and solvers to implement a number of analysis operations on FMs. The implementatio...
Sergio Segura, David Benavides, Antonio Ruiz Cort&...