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ASPDAC
2005
ACM
130views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Stability analysis of active clock deskewing systems using a control theoretic approach
— In this paper, a methodology for analyzing closed loop clock distribution and active deskewing networks is proposed. An active clock distribution and deskewing network is model...
Vinil Varghese, Tom Chen, Peter Young
CODES
2010
IEEE
13 years 5 months ago
Worst-case performance analysis of synchronous dataflow scenarios
Synchronous Dataflow (SDF) is a powerful analysis tool for regular, cyclic, parallel task graphs. The behaviour of SDF graphs however is static and therefore not always able to ac...
Marc Geilen, Sander Stuijk
DSOM
2000
Springer
14 years 1 days ago
Operational Data Analysis: Improved Predictions Using Multi-computer Pattern Detection
Operational Data Analysis (ODA) automatically 1) monitors the performance of a computer through time, 2) stores such information in a data repository, 3) applies data-mining techn...
Ricardo Vilalta, Chidanand Apté, Sholom M. ...
IPPS
2006
IEEE
14 years 1 months ago
A performance model for fine-grain accesses in UPC
UPC’s implicit communication and fine-grain programming style make application performance modeling a challenging task. The correspondence between remote references and communi...
Zhang Zhang, S. R. Seidel
DATE
2000
IEEE
110views Hardware» more  DATE 2000»
14 years 4 days ago
Stochastic Modeling and Performance Evaluation for Digital Clock and Data Recovery Circuits
Clock and data recovery circuits are essential components in communication systems. They directly influence the bit-error-rate performance of communication links. It is desirable...
Alper Demir, Peter Feldmann