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TPDS
2008
93views more  TPDS 2008»
13 years 7 months ago
Evaluating Dynamic Task Mapping in Network Processor Runtime Systems
Modern network processor systems require the ability to adapt their processing capabilities at runtime to changes in network traffic. Traditionally, network processor applications ...
Xin Huang, Tilman Wolf
SSDBM
2010
IEEE
248views Database» more  SSDBM 2010»
14 years 16 days ago
Client + Cloud: Evaluating Seamless Architectures for Visual Data Analytics in the Ocean Sciences
Science is becoming data-intensive, requiring new software architectures that can exploit resources at all scales: local GPUs for interactive visualization, server-side multi-core ...
Keith Grochow, Bill Howe, Mark Stoermer, Roger S. ...
MICRO
2007
IEEE
141views Hardware» more  MICRO 2007»
14 years 1 months ago
Composable Lightweight Processors
Modern chip multiprocessors (CMPs) are designed to exploit both instruction-level parallelism (ILP) within processors and thread-level parallelism (TLP) within and across processo...
Changkyu Kim, Simha Sethumadhavan, M. S. Govindan,...
ISCA
1993
IEEE
92views Hardware» more  ISCA 1993»
13 years 11 months ago
The Detection and Elimination of Useless Misses in Multiprocessors
In this paper we introduce a classification of misses in shared-memory multiprocessors based on inter processor communication. We identify the set of essential misses, i.e., the s...
Michel Dubois, Jonas Skeppstedt, Livio Ricciulli, ...
ICPP
2008
IEEE
14 years 1 months ago
Enabling Streaming Remoting on Embedded Dual-Core Processors
Dual-core processors (and, to an extent, multicore processors) have been adopted in recent years to provide platforms that satisfy the performance requirements of popular multimed...
Kun-Yuan Hsieh, Yen-Chih Liu, Po-Wen Wu, Shou-Wei ...