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GRAPHITE
2006
ACM
14 years 2 months ago
GPU-based rendering of sparse low-degree implicit surfaces
Implicit surface is a well-known surface representation. Geometric details of an object can be represented using less surface primitives than other representations such as polygon...
Takashi Kanai, Yutaka Ohtake, Hiroaki Kawata, Kiwa...
IEEEPACT
2007
IEEE
14 years 2 months ago
JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
Marek Olszewski, Jeremy Cutler, J. Gregory Steffan
WSC
2004
13 years 10 months ago
Implementing the High Level Architecture in the Virtual Test Bed
The Virtual Test Bed (VTB) is a prototype of a virtual engineering environment to study operations of current and future space vehicles, spaceports, and ranges. The HighLevel Arch...
José A. Sepúlveda, Luis C. Rabelo, J...
HPCA
2005
IEEE
14 years 9 months ago
SENSS: Security Enhancement to Symmetric Shared Memory Multiprocessors
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...
Youtao Zhang, Lan Gao, Jun Yang 0002, Xiangyu Zhan...
CONSTRAINTS
2006
99views more  CONSTRAINTS 2006»
13 years 8 months ago
An Integrated Method for Planning and Scheduling to Minimize Tardiness
We combine mixed integer linear programming (MILP) and constraint programming (CP) to minimize tardiness in planning and scheduling. Tasks are allocated to facilities using MILP an...
John N. Hooker