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ASPLOS
2010
ACM
16 years 17 days ago
Flexible architectural support for fine-grain scheduling
To make efficient use of CMPs with tens to hundreds of cores, it is often necessary to exploit fine-grain parallelism. However, managing tasks of a few thousand instructions is ...
Daniel Sanchez, Richard M. Yoo, Christos Kozyrakis
CIDR
2009
181views Algorithms» more  CIDR 2009»
15 years 6 months ago
The Case for RodentStore: An Adaptive, Declarative Storage System
Recent excitement in the database community surrounding new applications--analytic, scientific, graph, geospatial, etc.--has led to an explosion in research on database storage sy...
Philippe Cudré-Mauroux, Eugene Wu, Samuel M...
TPDS
2008
150views more  TPDS 2008»
15 years 5 months ago
Mitosis: A Speculative Multithreaded Processor Based on Precomputation Slices
This paper presents the Mitosis framework, which is a combined hardware-software approach to speculative multithreading, even in the presence of frequent dependences among threads....
Carlos Madriles, Carlos García Quiño...
OOPSLA
2010
Springer
15 years 4 months ago
Hera-JVM: a runtime system for heterogeneous multi-core architectures
Heterogeneous multi-core processors, such as the IBM Cell processor, can deliver high performance. However, these processors are notoriously difficult to program: different cores...
Ross McIlroy, Joe Sventek
MICRO
2010
IEEE
202views Hardware» more  MICRO 2010»
15 years 14 days ago
Hardware Support for Relaxed Concurrency Control in Transactional Memory
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
Utku Aydonat, Tarek S. Abdelrahman