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» Analyzing DB2 Data Sharing Performance Problems
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IPPS
2006
IEEE
14 years 4 months ago
Reducing the associativity and size of step caches in CRCW operation
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
M. Forsell
DATE
2005
IEEE
135views Hardware» more  DATE 2005»
14 years 4 months ago
Compositional Memory Systems for Multimedia Communicating Tasks
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
CL
2007
Springer
13 years 10 months ago
A bulk-synchronous parallel process algebra
The CCS (Calculus of Communicating Systems) process algebra is a well-known formal model of synchronization and communication. It is used for the analysis of safety and liveness i...
Armelle Merlin, Gaétan Hains
IPPS
2006
IEEE
14 years 4 months ago
Dual-layered file cache on cc-NUMA system
CC-NUMA is a widely adopted and deployed architecture of high performance computers. These machines are attractive for their transparent access to local and remote memory. However...
Zhou Yingchao, Meng Dan, Ma Jie
POPL
2003
ACM
14 years 11 months ago
Selective memoization
We present a framework for applying memoization selectively. The framework provides programmer control over equality, space usage, and identification of precise dependences so tha...
Umut A. Acar, Guy E. Blelloch, Robert Harper