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» Analyzing Loop Paths for Execution Time Estimation
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PAM
2010
Springer
14 years 2 months ago
Toward Topology Dualism: Improving the Accuracy of AS Annotations for Routers
Abstract. To describe, analyze, and model the topological and structural characteristics of the Internet, researchers use Internet maps constructed at the router or autonomous syst...
Bradley Huffaker, Amogh Dhamdhere, Marina Fomenkov...
HPCA
2008
IEEE
14 years 8 months ago
DeCoR: A Delayed Commit and Rollback mechanism for handling inductive noise in processors
Increases in peak current draw and reductions in the operating voltages of processors continue to amplify the importance of dealing with voltage fluctuations in processors. Noise-...
Meeta Sharma Gupta, Krishna K. Rangan, Michael D. ...
RTSS
2008
IEEE
14 years 2 months ago
WCET Analysis of Multi-level Non-inclusive Set-Associative Instruction Caches
With the advent of increasingly complex hardware in realtime embedded systems (processors with performance enhancing features such as pipelines, cache hierarchy, multiple cores), ...
Damien Hardy, Isabelle Puaut
HPDC
2005
IEEE
14 years 1 months ago
Genetic algorithm based automatic data partitioning scheme for HPF
good data partitioning scheme is the need of the time. However it is very diflcult to arrive at a good solution as the number of possible dutupartitionsfor a given real lifeprogra...
Sunil Kumar Anand, Y. N. Srikant
SIES
2009
IEEE
14 years 2 months ago
A modular fast simulation framework for stream-oriented MPSoC
—The performance estimation of complex multi-processor systems-on-chip (MPSoC) in a reasonable amount of time and with a good accuracy becomes more and more challenging due to th...
Kai Huang, Iuliana Bacivarov, Jun Liu, Wolfgang Ha...