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CGO
2006
IEEE
15 years 10 months ago
A Cross-Architectural Interface for Code Cache Manipulation
Software code caches help amortize the overhead of dynamic binary transformation by enabling reuse of transformed code. Since code caches contain a potentiallyaltered copy of ever...
Kim M. Hazelwood, Robert S. Cohn
CGO
2006
IEEE
15 years 10 months ago
Exhaustive Optimization Phase Order Space Exploration
The phase-ordering problem is a long standing issue for compiler writers. Most optimizing compilers typically have numerous different code-improving phases, many of which can be a...
Prasad Kulkarni, David B. Whalley, Gary S. Tyson, ...
IMSCCS
2006
IEEE
15 years 10 months ago
Identification of New Members of Hydrophobin Family Using Primary Structure Analysis
Background: Hydrophobins are fungal proteins that can turn into amphipathic membranes at hydrophilic/hydrophobic interfaces by self-assembly. The assemblages by Class I hydrophobi...
Kuan Yang, Youping Deng, Chaoyang Zhang, Mohamed O...
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
15 years 10 months ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood
SRDS
2006
IEEE
15 years 10 months ago
Reliably Executing Tasks in the Presence of Untrusted Entities
In this work we consider a distributed system formed by a master processor and a collection of n processors (workers) that can execute tasks; worker processors are untrusted and m...
Antonio Fernández, Luis López, Agust...