Sciweavers

2204 search results - page 426 / 441
» Analyzing architectural styles
Sort
View
ICS
1999
Tsinghua U.
14 years 2 months ago
Software trace cache
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
Alex Ramírez, Josep-Lluis Larriba-Pey, Carl...
ICCCN
1998
IEEE
14 years 2 months ago
Fast Recovery Protocol for Database and Link Failures in Mobile Networks
An important issue in the design of future Personal Communication Services (PCS) networks is the efficient management of location information. The current IS-41 standard P C S arc...
Govind Krishnamurthi, Stefano Chessa, Arun K. Soma...
VLDB
1999
ACM
145views Database» more  VLDB 1999»
14 years 2 months ago
DBMSs on a Modern Processor: Where Does Time Go?
Recent high-performance processors employ sophisticated techniques to overlap and simultaneously execute multiple computation and memory operations. Intuitively, these techniques ...
Anastassia Ailamaki, David J. DeWitt, Mark D. Hill...
MICRO
1998
IEEE
108views Hardware» more  MICRO 1998»
14 years 2 months ago
Exploiting Instruction Level Parallelism in Geometry Processing for Three Dimensional Graphics Applications
Three dimensional (3D) graphics applications have become very important workloads running on today's computer systems. A cost-effective graphics solution is to perform geomet...
Chia-Lin Yang, Barton Sano, Alvin R. Lebeck
ITS
1998
Springer
213views Multimedia» more  ITS 1998»
14 years 2 months ago
Component-Based Construction of a Science Learning Space
We present a vision for learning environments, called Science Learning Spaces, that are rich in engaging content and activities, provide constructive experiences in scientific proc...
Kenneth R. Koedinger, Daniel D. Suthers, Kenneth D...