We present a set of reduction rules for LTL model-checking of 1-safe Petri nets. Our reduction techniques are of two kinds: (1) Linear programming techniques which are based on wel...
Abstract. As semiconductor technology strides towards billions of transistors on a single die, problems concerned with deep sub-micron process features and design productivity call...
Josep Carmona, Jordi Cortadella, Victor Khomenko, ...
: In this paper, we suggest a requirement engineering process that generates a user interface prototype from scenarios and yields a formal specification of the system in form of a ...
Abstract. Reset/inhibitor nets are Petri nets extended with reset arcs and inhibitor arcs. A reset arc allows a transition to remove all tokens from a certain place when the transi...
H. M. W. Verbeek, Moe Thandar Wynn, Wil M. P. van ...
We propose rewriting logic as a unifying framework for a wide range of Petri nets models. We treat in detail place/transition nets and important extensions of the basic model by in...