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» Application of Reduce Order Modeling to Time Parallelization
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PPOPP
2005
ACM
14 years 1 months ago
Exposing disk layout to compiler for reducing energy consumption of parallel disk based systems
Disk subsystem is known to be a major contributor to overall power consumption of high-end parallel systems. Past research proposed several architectural level techniques to reduc...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, A...
CCGRID
2001
IEEE
13 years 11 months ago
OVM: Out-of-Order Execution Parallel Virtual Machine
High performance computing on parallel architectures currently uses different approaches depending on the hardory model of the architecture, the abstraction level of the programmi...
George Bosilca, Gilles Fedak, Franck Cappello
FORMATS
2007
Springer
13 years 11 months ago
Partial Order Reduction for Verification of Real-Time Components
Abstract. We describe a partial order reduction technique for a realtime component model. Components are described as timed automata with data ports, which can be composed in stati...
John Håkansson, Paul Pettersson
ASPDAC
2008
ACM
106views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Hierarchical Krylov subspace reduced order modeling of large RLC circuits
In this paper, we propose a new model order reduction approach for large interconnect circuits using hierarchical decomposition and Krylov subspace projection-based model order re...
Duo Li, Sheldon X.-D. Tan
WSC
2008
13 years 10 months ago
An application of parallel Monte Carlo modeling for real-time disease surveillance
The global health, threatened by emerging infectious diseases, pandemic influenza, and biological warfare, is becoming increasingly dependent on the rapid acquisition, processing,...
David W. Bauer, Mojdeh Mohtashemi