3171 search results - page 52 / 635 » Application of Reduce Order Modeling to Time Parallelization |
151
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DSRT
2006
IEEE
15 years 8 months ago
2006
IEEE
In this paper, we report on a series of experiments involving the speedups obtainable with time-parallel simulation of wireless ad hoc networks. A mobile ad hoc network scenario i...
105
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ASPLOS
2010
ACM
15 years 9 months ago
2010
ACM
Growing transistor counts, limited power budgets, and the breakdown of voltage scaling are currently conspiring to create a utilization wall that limits the fraction of a chip tha...
121
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RSP
2005
IEEE
15 years 8 months ago
2005
IEEE
Networks-on-chip (NoCs) are an emergent communication infrastructure, which can be designed to deal with growing system complexity and technology evolution. The efficient use of N...
136
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CCGRID
2006
IEEE
15 years 8 months ago
2006
IEEE
— Desktop grids use the idle cycles of desktop PC’s to provide huge computational power at low cost. However, because the underlying desktop computing resources are volatile, a...
88
Voted
IPPS
1998
IEEE
15 years 6 months ago
1998
IEEE
A set of synchronization relations between distributed nonatomic events was recently proposed to provide real-time applications with a fine level of discrimination in the specifica...