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» Application of Reduce Order Modeling to Time Parallelization
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ICPP
2009
IEEE
14 years 2 months ago
Speeding Up Distributed MapReduce Applications Using Hardware Accelerators
—In an attempt to increase the performance/cost ratio, large compute clusters are becoming heterogeneous at multiple levels: from asymmetric processors, to different system archi...
Yolanda Becerra, Vicenç Beltran, David Carr...
PDP
2008
IEEE
14 years 2 months ago
Just-In-Time Scheduling for Loop-based Speculative Parallelization
Scheduling for speculative parallelization is a problem that remained unsolved despite its importance. Simple methods such as Fixed-Size Chunking (FSC) need several ‘dry-runs’...
Diego R. Llanos Ferraris, David Orden, Belé...
HPCA
1995
IEEE
13 years 11 months ago
Access Ordering and Memory-Conscious Cache Utilization
As processor speeds increase relative to memory speeds, memory bandwidth is rapidly becoming the limiting performance factor for many applications. Several approaches to bridging ...
Sally A. McKee, William A. Wulf
IPPS
2006
IEEE
14 years 1 months ago
A simulator for parallel applications with dynamically varying compute node allocation
Dynamically allocating computing nodes to parallel applications is a promising technique for improving the utilization of cluster resources. We introduce the concept of dynamic ef...
Basile Schaeli, B. Gerlach, Roger D. Hersch
CLUSTER
2006
IEEE
14 years 1 months ago
A Performance Prediction Methodology for Data-dependent Parallel Applications
The increase in the use of parallel distributed architectures in order to solve large-scale scientific problems has generated the need for performance prediction for both determi...
Paula Cecilia Fritzsche, Concepció Roig, An...