1934 search results - page 3 / 387 » Application specific NoC design |
JSA
2007
2007
Application of deterministic and stochastic Petri-Nets for performance modeling of NoC architectures
13 years 9 months ago
The design of appropriate communication architectures for complex Systems-on-Chip (SoC) is a challenging task. One promising alternative to solve these problems are Networks-on-Ch...
DAC
2005
ACM
14 years 10 months ago
2005
ACM
As feature sizes shrink, transient failures of on-chip network links become a critical problem. At the same time, many applications require guarantees on both message arrival prob...
ASAP
2005
IEEE
14 years 3 months ago
2005
IEEE
Users expect future handhelddevices to provide extended multimedia functionality and have long battery life. This type of application imposes heavy constraints on performance and ...
JSA
2010
13 years 4 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
NOCS
2010
IEEE
13 years 7 months ago
2010
IEEE
Router microarchitecture plays a central role in the performance of an on-chip network (NoC). Buffers are needed in routers to house incoming flits which cannot be immediately forw...