NOCS 2010 - PDF Preprint Papers

NOCS 2010 International Symposium on Networks-on-Chip

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NOCS
2010
IEEE

236views Computer Networks» more NOCS 2010»

A 128 x 128 x 24Gb/s Crossbar Interconnecting 128 Tiles in a Single Hop and Occupying 6% of Their Area

13 years 10 months ago

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Giorgos Passas, Manolis Katevenis, Dionisios N. Pn...

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Id	Views	Title	Status

1	236	A 128 x 128 x 24Gb/s Crossbar Interconnecting 128 Tiles in a Single Hop and Occupying 6% of Their Area	claim
2	196	Design of a High-Throughput Distributed Shared-Buffer NoC Router	claim
3	194	Asynchronous Bypass Channels: Improving Performance for Multi-synchronous NoCs	claim
4	177	Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing	claim
5	170	Back Suction: Service Guarantees for Latency-Sensitive On-chip Networks	claim
6	167	A Network Congestion-Aware Memory Controller	claim
7	142	A Low-Overhead Asynchronous Interconnection Network for GALS Chip Multiprocessors	claim
8	136	Ultra Fine-Grained Run-Time Power Gating of On-chip Routers for CMPs	claim
9	132	Physical vs. Virtual Express Topologies with Low-Swing Links for Future Many-Core NoCs	claim
10	129	Traffic- and Thermal-Aware Run-Time Thermal Management Scheme for 3D NoC Systems	claim
11	128	Performance Evaluation of a Multicore System with Optically Connected Memory Modules	claim
12	126	Evaluating Bufferless Flow Control for On-chip Networks	claim
13	122	Power-Efficient and High-Performance Multi-level Hybrid Nanophotonic Interconnect for Multicores	claim
14	119	Comparing Energy and Latency of Asynchronous and Synchronous NoCs for Embedded SoCs	claim
15	118	Fault-Tolerant Flow Control in On-chip Networks	claim
16	115	Photonic Chip-Scale Interconnection Networks for Performance-Energy Optimized Computing	claim
17	113	Improving the Performance of GALS-Based NoCs in the Presence of Process Variation	claim
18	113	Physical-Aware Link Allocation and Route Assignment for Chip Multiprocessing	claim
19	110	Semiconductor Industry: Perspective, Evolution and Challenges	claim

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