1398 search results - page 108 / 280 » Application-Specific Integrated Circuits |
IOLTS
2008
IEEE
14 years 2 months ago
2008
IEEE
— Error correcting coding is the dominant technique to achieve acceptable soft-error rates in memory arrays. In many modern circuits, the number of memory elements in the random ...
IJCNN
2007
IEEE
14 years 2 months ago
2007
IEEE
- We present an application of a massively parallel processor array VLSI circuit to the implementation of neural networks in complex architectural arrangements. The work was motiva...
DFT
2000
IEEE
13 years 11 months ago
2000
IEEE
We present a configuration technique for a Large Area Integrated Circuit (LAIC) which is manufactured by wafer stepping. A LAIC consists of four identical subsystems, i.e., a subs...
DAGSTUHL
2004
13 years 9 months ago
2004
Virtually every system designed today is an amalgam of hardware and software. Unfortunately, software and circuits that communicate across the hardware/software boundary are tedio...
SLIP
2009
ACM
14 years 2 months ago
2009
ACM
Individual dies in 3D integrated circuits are connected using throughsilicon-vias (TSVs). TSVs not only increase manufacturing cost, but also incur silicon area, delay, and power ...