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ISQED
2007
IEEE
150views Hardware» more  ISQED 2007»
14 years 2 months ago
A Design Methodology for Matching Improvement in Bandgap References
Errors caused by tolerance variations and mismatches among components severely degrade the performance of integrated circuits. These random effects in process parameters significa...
Juan Pablo Martinez Brito, Hamilton Klimach, Sergi...
SBCCI
2006
ACM
200views VLSI» more  SBCCI 2006»
14 years 2 months ago
A differential switched-capacitor amplifier with programmable gain and output offset voltage
The design of a low-power differential switched-capacitor amplifier for processing a fully-differential input signal coming from a pressure sensor interface is reported. The circu...
Fabio Lacerda, Stefano Pietri, Alfredo Olmos
FPGA
2004
ACM
121views FPGA» more  FPGA 2004»
14 years 1 months ago
Highly pipelined asynchronous FPGAs
We present the design of a high-performance, highly pipelined asynchronous FPGA. We describe a very fine-grain pipelined logic block and routing interconnect architecture, and sh...
John Teifel, Rajit Manohar
CCECE
2009
IEEE
14 years 27 days ago
A full-rate truly monolithic CMOS CDR for low-cost applications
A truly monolithic clock and data recovery (CDR) circuit for low cost low-end data communication systems has been realized in 0.6ȝm CMOS. The implemented CDR comprises a phase-an...
Bangli Liang, Zhigong Wang, Dianyong Chen, Bo Wang...
IJCNN
2000
IEEE
14 years 16 days ago
Analog Hardware Implementation of the Random Neural Network Model
This paper presents a simple continuous analog hardware realization of the Random Neural Network (RNN) model. The proposed circuit uses the general principles resulting from the u...
Hossam Abdelbaki, Erol Gelenbe, Said E. El-Khamy