In the last decade, researchers have devoted increasing efforts to reduce the average power consumption in VLSI systems during normal operation mode, while power consumption durin...
This report analyzes two popular heuristics for ensuring packet integrity in ATM switching systems. In particular, we analyze the behavior of packet tail discarding, in order to u...
—Discrete gate sizing is one of the most commonly used, flexible, and powerful techniques for digital circuit optimization. The underlying problem has been proven to be NP-hard ...
Puneet Gupta, Andrew B. Kahng, Amarnath Kasibhatla...
The Vector Integration to Endpoint (VITE) circuit describes a real-time neural network model simulating behavioral and neurobiological properties of planned arm and hand movements...
Metastability is a phenomenon that can cause system failures in digital circuits. It may occur whenever signals are being transmitted across asynchronous or unrelated clock domain...