259 search results - page 43 / 52 » Application-specific instruction generation for configurable... |
ISCA
1999
IEEE
13 years 11 months ago
1999
IEEE
This paper presents a technique called register value prediction (RVP) which uses a type of locality called register-value reuse. By predicting that an instruction will produce th...
CGO
2007
IEEE
14 years 1 months ago
2007
IEEE
The increasing complexity of hardware features for recent processors makes high performance code generation very challenging. In particular, several optimization targets have to b...
ISCA
2002
IEEE
13 years 7 months ago
2002
IEEE
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
CASES
2005
ACM
13 years 9 months ago
2005
ACM
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
DAC
1999
ACM
13 years 11 months ago
1999
ACM
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...