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ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
14 years 1 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
IWCC
1999
IEEE
14 years 1 months ago
Single I/O Space for Scalable Cluster Computing
In this paper, we propose a novel Single I/O Space architecture for achieving a Single System Image (SSI) at the I/O subsystem level. This is very much desired in a scalable clust...
Roy S. C. Ho, Hai Jin, Kai Hwang
WETICE
1999
IEEE
14 years 1 months ago
Replacing Copies with Connections: Managing Software across the Virtual Organization
The Internet, the World Wide Web, JavaTM technology, and software components are changing the software business. Activities traditionally constrained by the need for intense infor...
Tobias Murer, Michael L. Van de Vanter
GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
14 years 1 months ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
IPPS
1998
IEEE
14 years 1 months ago
Design, Implementation and Evaluation of Parallel Pipelined STAP on Parallel Computers
This paper presents performance results for the design and implementation of parallel pipelined Space-Time Adaptive Processing (STAP) algorithms on parallel computers. In particul...
Alok N. Choudhary, Wei-keng Liao, Donald Weiner, P...