In this paper we study the problems of sorting and selection on the Distributed Memory Bus Computer (DMBC) recently introduced by Sahni. In particular we present: 1) An efficient a...
We propose a novel technique for modeling and verifying timed circuits based on the notion of generalized relative timing. Generalized relative timing constraints can express not ...
Sanjit A. Seshia, Randal E. Bryant, Kenneth S. Ste...
Given a set Q of keywords, conventional keyword search (KS) returns a set of tuples, each of which (i) is obtained from a single relation, or by joining multiple relations, and (i...
Abstract— This paper describes the first VLSI implementation of lattice reduction (LR) aided multi-antenna broadcast precoding with vector perturbation. The considered LR scheme...
Mixed Multi-Unit Combinatorial Auctions extend and generalize all the preceding types of combinatorial auctions. In this paper, we try to make headway on the practical application...