1066 search results - page 61 / 214 » Applying Architectural Hybridization in Networked Embedded S... |
152
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CODES
2006
IEEE
15 years 10 months ago
2006
IEEE
Virtual platform (ViP), or ESL (Electronic System Level) simulation model, is one of the most widely renowned system level design techniques. In this paper, we present a case stud...
153
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SBCCI
2005
ACM
15 years 10 months ago
2005
ACM
This work addresses the problem of application mapping in networks-on-chip (NoCs). It explores the importance of characterizing network traffic to effectively predict NoC energy c...
156
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MSS
2007
IEEE
15 years 10 months ago
2007
IEEE
The high demand for large scale storage capacity calls for the availability of massive storage solutions with high performance interconnects. Although cluster file systems are rap...
144
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CAISE
2004
Springer
15 years 9 months ago
2004
Springer
Advanced Business Process Management (BPM) tools enable the decomposition of previously integrated and often ill-defined processes into reusable process modules. These process modu...
187
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DATE
2003
IEEE
15 years 9 months ago
2003
IEEE
This paper presents the SPIN micro-network that is a generic, scalable interconnect architecture for system on chip. The SPIN architecture relies on packet switching and point-to-...