We present an efficient technique for finding the mean and variance of the full-chip leakage of a candidate design, while considering logic-structures and both die-to-die and with...
We address the problem of estimating controller delay from high-level specifications during behavioral synthesis. Typically, the critical path of a synthesised behavioral design g...
Gagan Raj Gupta, Madhur Gupta, Preeti Ranjan Panda
Correctness is a paramount attribute of any microprocessor design; however, without novel technologies to tame the increasing complexity of design verification, the amount of bugs...
In this paper we propose a novel approach to feature enhancement to enhance the quality of noisy images. Our approach is based on a phase-based feature detection algorithm, followe...
In this paper, we focus on velocity estimation in ultrasound images sequences. Ultrasound images present many difficulties in image processing because of the typically high level o...