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DAC
2009
ACM
14 years 8 months ago
Provably good and practically efficient algorithms for CMP dummy fill
Abstract--To reduce chip-scale topography variation in Chemical Mechanical Polishing (CMP) process, dummy fill is widely used to improve the layout density uniformity. Previous res...
Chunyang Feng, Hai Zhou, Changhao Yan, Jun Tao, Xu...
ICCAD
2009
IEEE
159views Hardware» more  ICCAD 2009»
13 years 5 months ago
First steps towards SAT-based formal analog verification
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
Saurabh K. Tiwary, Anubhav Gupta, Joel R. Phillips...
CEC
2007
IEEE
13 years 9 months ago
Fitness inheritance in evolutionary and multi-objective high-level synthesis
Abstract—The high-level synthesis process allows the automatic design and implementation of digital circuits starting from a behavioral description. Evolutionary algorithms are v...
Christian Pilato, Gianluca Palermo, Antonino Tumeo...
LATIN
2010
Springer
13 years 6 months ago
Packet Routing on the Grid
The packet routing problem, i.e., the problem to send a given set of unit-size packets through a network on time, belongs to one of the most fundamental routing problems with impor...
Britta Peis, Martin Skutella, Andreas Wiese
ICALP
2005
Springer
14 years 1 months ago
New Approaches for Virtual Private Network Design
Virtual Private Network Design is the following NP-hard problem. We are given a communication network, represented as a weighted graph with thresholds on the nodes which represent...
Friedrich Eisenbrand, Fabrizio Grandoni, Gianpaolo...