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DDECS
2007
IEEE
175views Hardware» more  DDECS 2007»
14 years 4 months ago
Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair
—An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. A commonly used repair strategy is to equip memories with sp...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...
ICCV
2001
IEEE
14 years 11 months ago
Beyond Lambert: Reconstructing Surfaces with Arbitrary BRDFs
W e address an open and hitherto neglected problem in computer vision, how to reconstruct the geometry of objects with arbitrary and possibly anisotropic bidirectional reflectance...
Sebastian Magda, David J. Kriegman, Todd Zickler, ...
POPL
2008
ACM
14 years 10 months ago
High-level small-step operational semantics for transactions
Software transactions have received significant attention as a way to simplify shared-memory concurrent programming, but insufficient focus has been given to the precise meaning o...
Katherine F. Moore, Dan Grossman
PADS
2005
ACM
14 years 3 months ago
The WarpIV Simulation Kernel
ct This paper provides an overview of the WarpIV Simulation Kernel that was designed to be an initial implementation of the Standard Simulation Architecture (SSA). WarpIV is the ne...
Jeffrey S. Steinman
CADE
1998
Springer
14 years 2 months ago
System Description: leanK 2.0
Abstract. leanK is a "lean", i.e., extremely compact, Prolog implementation of a free variable tableau calculus for propositional modal logics. leanK 2.0 includes additio...
Bernhard Beckert, Rajeev Goré