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» Architectural Considerations for Energy Efficiency
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MOBICOM
2010
ACM
13 years 9 months ago
CTRL: a self-organizing femtocell management architecture for co-channel deployment
Femtocell technology has been drawing considerable attention as a cost-effective means of improving cellular coverage and capacity. However, under co-channel deployment, femtocell...
Ji-Hoon Yun, Kang G. Shin
JSA
2000
116views more  JSA 2000»
13 years 9 months ago
Distributed vector architectures
Integrating processors and main memory is a promising approach to increase system performance. Such integration provides very high memory bandwidth that can be exploited efficientl...
Stefanos Kaxiras
JEC
2006
100views more  JEC 2006»
13 years 9 months ago
RC-SIMD: Reconfigurable communication SIMD architecture for image processing applications
During the last two decades, Single Instruction Multiple Data (SIMD) processors have become important architectures in embedded systems for image processing applications. The main ...
Hamed Fatemi, Bart Mesman, Henk Corporaal, Twan Ba...
FPGA
2000
ACM
122views FPGA» more  FPGA 2000»
14 years 1 months ago
A reconfigurable multi-function computing cache architecture
A considerable portion of a chip is dedicated to a cache memory in a modern microprocessor chip. However, some applications may not actively need all the cache storage, especially...
Huesung Kim, Arun K. Somani, Akhilesh Tyagi
MICRO
2008
IEEE
107views Hardware» more  MICRO 2008»
14 years 4 months ago
A distributed processor state management architecture for large-window processors
— Processor architectures with large instruction windows have been proposed to expose more instruction-level parallelism (ILP) and increase performance. Some of the proposed arch...
Isidro Gonzalez, Marco Galluzzi, Alexander V. Veid...