93 search results - page 6 / 19 » Architectural Mechanisms for Explicit Communication in Share... |
HASKELL
2005
ACM
14 years 1 months ago
2005
ACM
Multi-core processors are coming, and we need ways to program them. The combination of purely-functional programming and explicit, monadic threads, communicating using transaction...
SBCCI
2009
ACM
14 years 1 months ago
2009
ACM
We present an application-driven customization methodology for energy-efficient inter-core communication in embedded multiprocessors. The methodology leverages configurable cach...
CF
2010
ACM
14 years 16 days ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
DATE
2003
IEEE
14 years 22 days ago
2003
IEEE
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
ICS
1993
Tsinghua U.
13 years 11 months ago
1993
Tsinghua U.
Shared-memory provides a uniform and attractive mechanism for communication. For efficiency, it is often implemented with a layer of interpretive hardware on top of a message-pas...