Sciweavers

1308 search results - page 6 / 262
» Architectural Support for Dynamic Linking
Sort
View
TVLSI
2010
13 years 2 months ago
A Low-Area Multi-Link Interconnect Architecture for GALS Chip Multiprocessors
A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost, flexible routing capability, and supports globally asynchronous loc...
Zhiyi Yu, Bevan M. Baas
ASAP
2008
IEEE
167views Hardware» more  ASAP 2008»
14 years 1 months ago
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms
Process technology has reduced in size such that it is possible to implement complete applicationspecific architectures as Systems-on-Chip (SoCs) using both Application-Specific I...
David Dickin, Lesley Shannon
CONEXT
2008
ACM
13 years 9 months ago
DaVinci: dynamically adaptive virtual networks for a customized internet
Running multiple virtual networks, customized for different performance objectives, is a promising way to support diverse applications over a shared substrate. Despite being simpl...
Jiayue He, Rui Zhang-Shen, Ying Li, Cheng-Yen Lee,...
CCS
1997
ACM
13 years 11 months ago
The Security of Static Typing with Dynamic Linking
Dynamic linking is a requirement for portable executable content. Executable content cannot know, ahead of time, where it is going to be executed, nor know the proper operating sy...
Drew Dean
HPCA
1997
IEEE
13 years 11 months ago
Architectural Support for Compiler-Synthesized Dynamic Branch Prediction Strategies: Rationale and Initial Results
This paper introduces a new architectural approach that supports compiler-synthesized dynamic branch predication. In compiler-synthesized dynamic branch prediction, the compiler g...
David I. August, Daniel A. Connors, John C. Gyllen...