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116
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ISSS
1999
IEEE
120views Hardware» more  ISSS 1999»
15 years 6 months ago
RTGEN: An Algorithm for Automatic Generation of Reservation Tables from Architectural Descriptions
Abstract--Reservation Tables (RTs) have long been used to detect conflicts between operations that simultaneously access the same architectural resource. Traditionally, these RTs h...
Peter Grun, Ashok Halambi, Nikil D. Dutt, Alexandr...
121
Voted
DSN
2004
IEEE
15 years 6 months ago
An Architectural Framework for Providing Reliability and Security Support
This paper explores hardware-implemented error-detection and security mechanisms embedded as modules in a hardware-level framework called the Reliability and Security Engine (RSE)...
Nithin Nakka, Zbigniew Kalbarczyk, Ravishankar K. ...
134
Voted
HPCA
2012
IEEE
13 years 10 months ago
BulkSMT: Designing SMT processors for atomic-block execution
Multiprocessor architectures that continuously execute atomic blocks (or chunks) of instructions can improve performance and software productivity. However, all of the prior propo...
Xuehai Qian, Benjamin Sahelices, Josep Torrellas
109
Voted
ICC
2007
IEEE
15 years 9 months ago
INTELiCON: Intelligent Connectivity Framework for the Simultaneous Use of Multiple Interfaces
— Widespread deployment of Wi-Fi together with 3G upgrades to cellular networks is rapidly creating areas where multiple wireless IP technologies are accessible. WiMAX will furth...
Kyriakos Manousakis, Praveen Gopalakrishnan, Dave ...
175
Voted
OOPSLA
2010
Springer
15 years 1 months ago
Hera-JVM: a runtime system for heterogeneous multi-core architectures
Heterogeneous multi-core processors, such as the IBM Cell processor, can deliver high performance. However, these processors are notoriously difficult to program: different cores...
Ross McIlroy, Joe Sventek