255 search results - page 29 / 51 » Architectural Support for Synchronous Task Communication |
HPCA
2003
IEEE
14 years 8 months ago
2003
IEEE
Scalability of applications on distributed sharedmemory (DSM) multiprocessors is limited by communication overheads. At some point, using more processors to increase parallelism y...
ICW
2005
IEEE
14 years 1 months ago
2005
IEEE
Middleware development in the growing and promising field of sensor networks is a major challenge in order to facilitate the programmer task and bridge the gap between the applic...
RTSS
2007
IEEE
14 years 1 months ago
2007
IEEE
Time-triggered architectures (TTAs) are strong candidate platforms for safety-critical real-time applications. A typical time-triggered architecture is constituted by one or more ...
SIGGRAPH
2009
ACM
14 years 2 months ago
2009
ACM
We present a novel parallel continuous collision detection (PCCD) method to utilize the widely available multi-core CPU architecture. Our method works with a wide variety of defor...
ICAS
2008
IEEE
14 years 2 months ago
2008
IEEE
—The purpose of this paper is to present the linkage of Thetis (a real time multi-vehicles hybrid simulator for heterogeneous vehicles) with a control architecture for the manage...