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ICDAR
2011
IEEE
12 years 10 months ago
Wall Patch-Based Segmentation in Architectural Floorplans
Abstract—Segmentation of architectural floorplans is a challenging task, mainly because of the large variability in the notation between different plans. In general, traditional...
Lluís-Pere de las Heras, Joan Mas, Gemma S&...
VLSID
2007
IEEE
104views VLSI» more  VLSID 2007»
14 years 11 months ago
Customization of Register File Banking Architecture for Low Power
Register file banking is an effective alternative to monolithic register files in embedded processor based systems. In this work, we propose techniques for performing application s...
Rakesh Nalluri, Rohan Garg, Preeti Ranjan Panda
ICSE
2003
IEEE-ACM
14 years 11 months ago
Towards a Systems Engineering Pattern Language: Applying i* to Model Requirements-Architecture Patterns
This paper reports the results of exploratory research to develop a pilot pattern language for systems engineers at BAE SYSTEMS. The pattern language was designed to encapsulate k...
Pete Pavan, Neil A. M. Maiden, Xiaohong Zhu
DATE
2009
IEEE
138views Hardware» more  DATE 2009»
14 years 6 months ago
Hardware/software co-design architecture for thermal management of chip multiprocessors
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...
Omer Khan, Sandip Kundu
SBACPAD
2009
IEEE
155views Hardware» more  SBACPAD 2009»
14 years 5 months ago
SPARC16: A New Compression Approach for the SPARC Architecture
RISC processors can be used to face the ever increasing demand for performance required by embedded systems. Nevertheless, this solution comes with the cost of poor code density. ...
Leonardo Luiz Ecco, Bruno Cardoso Lopes, Eduardo C...