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ISCA
1999
IEEE
94views Hardware» more  ISCA 1999»
14 years 6 days ago
Storageless Value Prediction Using Prior Register Values
This paper presents a technique called register value prediction (RVP) which uses a type of locality called register-value reuse. By predicting that an instruction will produce th...
Dean M. Tullsen, John S. Seng
CGI
2004
IEEE
13 years 11 months ago
Computer Aided Design for Origamic Architecture Models with Polygonal Representation
An Origamic Architecture (OA) is a folded sheet of perforated paper from which a three-dimensional structure "pops up" when it is opened. It is similar to a "pop-up...
Jun Mitani, Hiromasa Suzuki
CASES
2009
ACM
13 years 11 months ago
A fault tolerant cache architecture for sub 500mV operation: resizable data composer cache (RDC-cache)
In this paper we introduce Resizable Data Composer-Cache (RDC-Cache). This novel cache architecture operates correctly at sub 500 mV in 65 nm technology tolerating large number of...
Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, F...
WMI
2001
147views more  WMI 2001»
13 years 9 months ago
A wireless public access infrastructure for supporting mobile context-aware IPv6 applications
This paper presents a novel wireless access point architecture designed to support the development of next generation mobile context-aware applications over metropolitan scale are...
Adrian Friday, Maomao Wu, Stefan Schmid, Joe Finne...
DATE
2004
IEEE
109views Hardware» more  DATE 2004»
13 years 11 months ago
RTL Processor Synthesis for Architecture Exploration and Implementation
Architecture description languages are widely used to perform architecture exploration for application-driven designs, whereas the RT-level is the commonly accepted level for hard...
Oliver Schliebusch, Anupam Chattopadhyay, Rainer L...