271 search results - page 12 / 55 » Architectural dependability evaluation with Arcade |
CGO
2003
IEEE
14 years 21 days ago
2003
IEEE
A dynamic binary translation system for a co-designed virtual machine is described and evaluated. The underlying hardware directly executes an accumulator-oriented instruction set...
CGO
2008
IEEE
14 years 1 months ago
2008
IEEE
Vector-thread (VT) architectures exploit multiple forms of parallelism simultaneously. This paper describes a compiler for the Scale VT architecture, which takes advantage of the ...
FPL
2009
Springer
14 years 18 hour ago
2009
Springer
Clock gating is a power reduction technique that has been used successfully in the custom ASIC domain. Clock and logic signal power are saved by temporarily disabling the clock si...
SECPERU
2006
IEEE
14 years 1 months ago
2006
IEEE
The extraordinary growth of the Information Society is originating a high dependency on ICT. This provokes that those strongly interrelated technological infrastructures, as well ...
INTEGRATION
2007
13 years 7 months ago
2007
The ubiquitous presence of mobile devices and the demand for better performance and efficiency have motivated research into embedded implementations of cryptography algorithms. I...