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» Architectural descriptions for FPGA circuits
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RECONFIG
2008
IEEE
268views VLSI» more  RECONFIG 2008»
14 years 3 months ago
Parametric, Secure and Compact Implementation of RSA on FPGA
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
Ersin Oksuzoglu, Erkay Savas
ERSA
2003
147views Hardware» more  ERSA 2003»
13 years 10 months ago
Towards Run-Time Re-Configurable Techniques for Real-Time Embedded Applications
Many embedded applications can benefit from the flexible custom computing opportunities that FPGA technology offers. The Run-Time Reconfiguration (RTR) of the FPGA as an applicati...
Timothy F. Oliver, Douglas L. Maskell
FPGA
2007
ACM
106views FPGA» more  FPGA 2007»
14 years 2 months ago
A synthesizable datapath-oriented embedded FPGA fabric
We present an architecture for a synthesizable datapathoriented Field Programmable Gate Array (FPGA) core which can be used to provide post-fabrication flexibility to a Systemon-...
Steven J. E. Wilton, Chun Hok Ho, Philip Heng Wai ...
DAC
2000
ACM
14 years 1 months ago
Using general-purpose programming languages for FPGA design
ct General-purpose programming languages (GPL) are effective vehicles for FPGA design because they are easy to use, extensible, widely available, and can be used to describe both t...
Brad L. Hutchings, Brent E. Nelson
FPGA
2008
ACM
163views FPGA» more  FPGA 2008»
13 years 10 months ago
TORCH: a design tool for routing channel segmentation in FPGAs
A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...
Mingjie Lin, Abbas El Gamal