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» Architectural descriptions for FPGA circuits
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AHS
2006
IEEE
137views Hardware» more  AHS 2006»
14 years 1 months ago
Genetic Algorithm based Engine for Domain-Specific Reconfigurable Arrays
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
Wing On Fung, Tughrul Arslan, Sami Khawam
ISCAS
2005
IEEE
134views Hardware» more  ISCAS 2005»
14 years 1 months ago
Heap charge pump optimisation by a tapered architecture
- The heap charge pump represents an attractive voltage multiplier scheme in integrated circuits where only low-voltage devices are available. This paper presents a performance opt...
R. Arona, Edoardo Bonizzoni, Franco Maloberti, Gui...
JUCS
2007
114views more  JUCS 2007»
13 years 7 months ago
Design and Implementation of the AMCC Self-Timed Microprocessor in FPGAs
: The development of processors with full custom technology has some disadvantages, such as the time used to design the processors and the cost of the implementation. In this artic...
Susana Ortega-Cisneros, Juan Jóse Raygoza-P...
ENC
2004
IEEE
13 years 11 months ago
On the Hardware Design of an Elliptic Curve Cryptosystem
We present a hardware architecture for an Elliptic Curve Cryptography System performing the three basic cryptographic schemes: DH key generation, encryption and digital signature....
Miguel Morales-Sandoval, Claudia Feregrino Uribe
AINA
2010
IEEE
14 years 12 days ago
The Cost Effective Pre-processing Based NFA Pattern Matching Architecture for NIDS
—Network Intrusion Detection System (NIDS) is a system which can detect network attacks resulted from worms and viruses on the Internet. An efficient pattern matching algorithm p...
Yeim-Kuan Chang, Chen-Rong Chang, Cheng-Chien Su