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VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
15 years 10 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
126
Voted
FPL
1998
Springer
106views Hardware» more  FPL 1998»
15 years 8 months ago
Acceleration of Satisfiability Algorithms by Reconfigurable Hardware
Abstract. We present different architectures to solve Boolean satisfiability problems in instance-specific hardware. A simulation of these architectures shows that for examples fro...
Marco Platzner, Giovanni De Micheli
HPDC
2000
IEEE
15 years 8 months ago
Flexible High-Performance Access to Distributed Storage Resources
We describe a software architecture for storage services in computational grid environments. Based upon a lightweight message-passing paradigm, the architecture enables the provis...
Craig J. Patten, Kenneth A. Hawick
PC
2007
161views Management» more  PC 2007»
15 years 3 months ago
High performance combinatorial algorithm design on the Cell Broadband Engine processor
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
David A. Bader, Virat Agarwal, Kamesh Madduri, Seu...
101
Voted
SIGCSE
2006
ACM
170views Education» more  SIGCSE 2006»
15 years 9 months ago
MARS: an education-oriented MIPS assembly language simulator
We describe the implementation of “MARS,” a GUI, Java-based simulator for the MIPS assembly language. MIPS, the computer architecture underlying the simulated assembly languag...
Kenneth Vollmar, Pete Sanderson