23406 search results - page 45 / 4682 » Architecture, Design, Implementation |
GLVLSI
2005
IEEE
14 years 3 months ago
2005
IEEE
This paper addresses a pipelined partial rolling (PPR) architecture for the AES encryption. The key technique is the PPR architecture, which is suitable for FPGA implementation. U...
ISCA
1996
IEEE
14 years 2 months ago
1996
IEEE
Simultaneous multithreading is a technique that permits multiple independent threads to issue multiple instructions each cycle. In previous work we demonstrated the performance po...
ERSA
2006
13 years 11 months ago
2006
MIMO systems have attracted great attentions because of their huge capacity. The hardware implementation of MIMO decoder becomes a challenging task as the complexity of the MIMO sy...
ICCCN
2007
IEEE
14 years 4 months ago
2007
IEEE
— Considerable research efforts in the networking community are focused on defining a new Internet architecture that not only solves some of the problems of the current design, ...
EHCI
2004
13 years 11 months ago
2004
Software architects have techniques to deal with many quality attributes such as performance, reliability, and maintainability. Usability, however, has traditionally been concerned...