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VLSISP
2011
241views Database» more  VLSISP 2011»
13 years 4 months ago
An Efficient VLSI Architecture of Fractional Motion Estimation in H.264 for HDTV
Abstract Fractional Motion Estimation (FME) in highdefinition H.264 presents a significant design challenge in terms of memory bandwidth, latency and area cost as there are various...
Gustavo A. Ruiz, Juan A. Michell
ICSE
2011
IEEE-ACM
13 years 15 days ago
Feature cohesion in software product lines: an exploratory study
Software product lines gain momentum in research and industry. duct-line approaches use features as a central abstraction mechanism. Feature-oriented software development aims at ...
Sven Apel, Dirk Beyer
CSSE
2008
IEEE
14 years 3 months ago
Designing and Verifying Communication Protocols Using Model Driven Architecture and Spin Model Checker
Abstract: The need of communication protocols in today’s environment increases as much as the network explores. Many new kinds of protocols, e.g. for information sharing, securit...
Prabhu Shankar Kaliappan, Hartmut Koenig, Vishnu K...
EVOW
2010
Springer
14 years 11 days ago
Parallel Genetic Algorithm on the CUDA Architecture
Abstract. This paper deals with the mapping of the parallel islandbased genetic algorithm with unidirectional ring migrations to nVidia CUDA software model. The proposed mapping is...
Petr Pospichal, Jirí Jaros, Josef Schwarz
ERSA
2009
185views Hardware» more  ERSA 2009»
13 years 6 months ago
Woolcano: An Architecture And Tool Flow For Dynamic Instruction Set Extension On Xilinx Virtex-4 FX
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...
Mariusz Grad, Christian Plessl