Sciweavers

76 search results - page 14 / 16
» Architecture Independent Performance Characterization and Be...
Sort
View
ASPLOS
2004
ACM
14 years 24 days ago
Compiler orchestrated prefetching via speculation and predication
This paper introduces a compiler-orchestrated prefetching system as a unified framework geared toward ameliorating the gap between processing speeds and memory access latencies. ...
Rodric M. Rabbah, Hariharan Sandanagobalane, Mongk...
ISCA
2009
IEEE
146views Hardware» more  ISCA 2009»
14 years 2 months ago
Multi-execution: multicore caching for data-similar executions
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
Susmit Biswas, Diana Franklin, Alan Savage, Ryan D...
IISWC
2009
IEEE
14 years 2 months ago
Experimental evaluation of N-tier systems: Observation and analysis of multi-bottlenecks
In many areas such as e-commerce, mission-critical N-tier applications have grown increasingly complex. They are characterized by non-stationary workloads (e.g., peak load several...
Simon Malkowski, Markus Hedwig, Calton Pu
CASES
2004
ACM
14 years 24 days ago
Balancing design options with Sherpa
Application specific processors offer the potential of rapidly designed logic specifically constructed to meet the performance and area demands of the task at hand. Recently, t...
Timothy Sherwood, Mark Oskin, Brad Calder
SIGCOMM
2010
ACM
13 years 7 months ago
Topology-aware resource allocation for data-intensive workloads
This paper proposes an architecture for optimized resource allocation in Infrastructure-as-a-Service (IaaS)-based cloud systems. Current IaaS systems are usually unaware of the ho...
Gunho Lee, Niraj Tolia, Parthasarathy Ranganathan,...