218 search results - page 37 / 44 » Architecture Level Power-Performance Tradeoffs for Pipelined... |
CASES
2008
ACM
13 years 11 months ago
2008
ACM
This paper proposes a combination of circuit and architectural techniques to maximize leakage power reduction in embedded processor on-chip caches. It targets cache peripheral cir...
ICCAD
1995
IEEE
14 years 16 days ago
1995
IEEE
We address the problem of minimizing power consumption in behavioral synthesis of data-dominated circuits. The complex nature of power as a cost function implies that the effects ...
DAC
2007
ACM
14 years 10 months ago
2007
ACM
The bus tracing is used to catch related signals for further investigation and analysis. However, the trace size of cycleaccurate tracing is large and the trace cycle is shallow u...
TAMC
2007
Springer
14 years 3 months ago
2007
Springer
In previous work we have introduced an average-case measure for the time complexity of Boolean circuits – that is the delay between feeding the input bits into a circuit and the ...
EGH
2004
Springer
14 years 2 months ago
2004
Springer
Realtime ray tracing has recently established itself as a possible alternative to the current rasterization approach for interactive 3D graphics. However, the performance of exist...