1381 search results - page 24 / 277 » Architecture and Design of a High Performance SRAM for SOC D... |
DDECS
2008
IEEE
13 years 9 months ago
2008
IEEE
The paper introduces a cryptographic System on a Chip (SoC) implementation based on recent Actel nonvolatile FPGA Fusion chip with embedded ARM7 soft-core processor. The SoC is bui...
DAC
2006
ACM
14 years 9 months ago
2006
ACM
In this paper, we propose a new linear programming based timing driven placement framework for high performance designs. Our LP framework is mainly net-based, but it takes advanta...
SC
2004
ACM
14 years 1 months ago
2004
ACM
This paper describes our experiences in the development of the UDP-based Data Transport (UDT) protocol, an application level transport protocol used in distributed data intensive ...
ISPAN
2000
IEEE
14 years 12 days ago
2000
IEEE
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
DANCE
2002
IEEE
14 years 1 months ago
2002
IEEE
This paper describes the design, implementation and performance of an open, high performance, dynamically extensible router under development at Washington University in St. Louis...