1381 search results - page 56 / 277 » Architecture and Design of a High Performance SRAM for SOC D... |
CSUR
2006
13 years 8 months ago
2006
resents a perspective on existing NoC research. We define the following abstractions: system, network adapter, network, and link to explain and structure the fundamental concepts. ...
RSP
2008
IEEE
14 years 2 months ago
2008
IEEE
ASIP-based implementations constitute a key trend in SoC design enabling optimal tradeoffs between performance and flexibility. This paper details a case study of an ASIP-based im...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
— This paper investigates the implementation of a number of circuits used to perform a high speed closest value match lookup. The design is targeted particularly for use in a sea...
HPCN
1995
Springer
13 years 11 months ago
1995
Springer
The Mermaid project focuses on the construction of simulation models for MIMD multi-computers in order to evaluate them and to give estimates of the system’s performance. A multi...
ICASSP
2011
IEEE
12 years 12 months ago
2011
IEEE
For high-data-rate applications, turbo-like iterative decoders are implemented with parallel hardware architecture. However, to achieve high throughput, concurrent accesses to each...