1381 search results - page 86 / 277 » Architecture and Design of a High Performance SRAM for SOC D... |
EMSOFT
2009
Springer
14 years 2 months ago
2009
Springer
System-on-Chip (SoC) is a promising paradigm to implement safety-critical embedded systems, but it poses significant challenges from a design and verification point of view. In ...
DT
2006
13 years 8 months ago
2006
process: Designers must define higher abstraction levels that allow system modeling. They must use description languages that handle both hardware and software components to descri...
ICRA
2009
IEEE
13 years 6 months ago
2009
IEEE
In previous studies on 4-DOF parallel mechanisms with four sub-chains, only symmetric arrangement of those four chains connected to the top plate was considered. Such symmetric sha...
AINA
2005
IEEE
14 years 1 months ago
2005
IEEE
Input Buffered Switches with Virtual Output Queues(VOQ) design to avoid Head-Of-Line problems, is a primary design of switches that can be scalable to very high speeds. However, t...
NOCS
2007
IEEE
14 years 2 months ago
2007
IEEE
We present a novel network-on-chip-based architecture for future programmable chips (FPGAs). A key challenge for FPGA design is supporting numerous highly variable design instance...