130 search results - page 11 / 26 » Architecture and Evaluation of an Asynchronous Array of Simp... |
IEEEPACT
1999
IEEE
13 years 11 months ago
1999
IEEE
In current superscalar processors, all floating-point resources are idle during the execution of integer programs. As previous works show, this problem can be alleviated if the fl...
NCA
2007
IEEE
14 years 1 months ago
2007
IEEE
Exponentially growing bandwidth requirements and slowing gains in processor speeds have led to the popularity of multiprocessor architectures. Network stack parallelism is increas...
CGO
2007
IEEE
13 years 11 months ago
2007
IEEE
Dynamic predication has been proposed to reduce the branch misprediction penalty due to hard-to-predict branch instructions. A recently proposed dynamic predication architecture, ...
IEEEPACT
2008
IEEE
14 years 1 months ago
2008
IEEE
We design and implement Mars, a MapReduce framework, on graphics processors (GPUs). MapReduce is a distributed programming framework originally proposed by Google for the ease of ...
MICRO
2000
IEEE
13 years 7 months ago
2000
IEEE
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...